发明名称 Process, apparatus and system for decoding variable-length encoded signals
摘要 A fixed-length signal is retrieved from a bitstream comprising one or more variable-length encoded signals. A variable-length encoded signal of the bitstream is decoded to generate a decoded signal corresponding to the fixed-length signal by accessing one or more tables in accordance with the fixed-length signal to retrieve a contribution, an input pointer flag, an output pointer flag, and a next state.
申请公布号 US5528238(A) 申请公布日期 1996.06.18
申请号 US19940234785 申请日期 1994.04.28
申请人 INTEL CORPORATION 发明人 NICKERSON, BRIAN
分类号 G06F17/14;G06T9/00;H04N7/15;H04N7/26;H04N7/30;H04N7/46;H04N7/50;H04N7/52;H04N7/68;H04Q11/04;(IPC1-7):H03M7/40 主分类号 G06F17/14
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