发明名称 IMPROVED TRELLIS CODER/DECODER OF SYMBOL-TIMING SUPPORTING BY
摘要 The improved trellis coder and decoder for restoring symbol timing by using pseudo noise code comprises a convolution encoder for coding a bit of the data bits by a convolution code; a first pseudo noise signal generator for generating a first pseudo noise signal; an adder for adding the first pseudo noise signal to each data bit output from the convolution encoder; a quadrature amplitude modulation mapper for quadrature amplitude modulating the remaining data bits which were not applied to the convolution encoder and the data bit output from the adder, mapping them according to the signal arrangement and outputting them to I and Q channels; a Pruner memory for restoring the I and Q channel data into the data which were not mapped; a second pseudo noise signal generator for generating a second pseudo noise signal and shifting data according to a clock signal; an adder for adding the second pseudo noise signal to the output of the Pruner memory; a soft decision viterbi decoder for viterbi-decoding the I and Q channel data and outputting as an original digital data; an error monitor for checking the bit error rate of the channel from the signal output from the soft decision viterbi decoder and determining if the symbol timing is correct; and a controller for generating a clock signal to apply it to the second pseudo noise signal generator according to the result of the error monitor.
申请公布号 KR960001794(B1) 申请公布日期 1996.02.05
申请号 KR19930027988 申请日期 1993.12.16
申请人 DAEWOO ELECTRONICS CO., LTD. 发明人 LIM, YONG - HEE
分类号 (IPC1-7):H03M13/12 主分类号 (IPC1-7):H03M13/12
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