| 摘要 |
<p>PURPOSE: To form a semiconductor memory device with a redundant circuit, in which a redundant efficiency is improved and the layout properties of a chip are enhanced. CONSTITUTION: A redundant memory cell array and a spare word line are mounted in a sub-memory cell array 200 in sub-memory cell arrays, and a sense amplifier 203 for the array 200 is controlled by the output signal REDBLSi of a sense-amplifier control circuit 201. Sense-amplifier control circuits 101-401 and a low decoder are controlled by the output signal REDBLK of a redundant- block selecting-signal generating circuit 202. A spare word-line driver and the redundant-block selecting-signal generating circuit 202 are controlled by the output signals RED0-3 of fuse boxes 211-214. Since the signal REDBLK reaches a logic 1 in response to the signals RED0-3 at the time of a redundant time, the operation of the sense amplifiers and the low decoder excepting the sub- memory cell array 200 is inhibited while a spare word line is selected by the spare word-line driver.</p> |
