A METHOD FOR HIGH-SPEED SIMULATION OF OCCURRANCE OF ERROR IN BIT PARALLEL ARTHMETIC OPERATION

摘要

The high speed method of a defect simulation in a VISI circuit comprises a first step of obtaining a normal output value and initializing the defect list of the output unit; a second step of checking the list if it has any cell having an identical group number; a third step of AND operating the defect bit of the selected cells if there are all operatable combinations; a fourth step of comparing a defect value with the normal output value, and if these two values are different from each other and there is any cell having the samel group number and defect value as the newly operated cell, OR operating two cells and if not, transferring only the newly operated cell to the output unit; and a fifth step of if there is any cell having the same group number and defect value as the transferred cell, OR operating two cells and if not, outputting the operated cell to the output unit and then returning to the second step.