发明名称 Rettungs- und Rückspeicherungsverfahren und Prozessorsystem dafür.
摘要 In a coprocessor system having a central processing unit (CPU, 100) as a host processor, a floating-point processing unit (FPU, 101) as a coprocessor and a memory (RAM, 103), coupled with each other through buses (104-106), when the CPU issues a save command to the FPU (101), the FPU (101) discriminates the attribute, i.e., a long command or a short command, of a current command executed by the FPU (101) upon receipt of the save command and the internal status thereof. In response to the discrimination result, the FPU (101) interrupts the execution of the current command at once to start the execution of the received save command, when the current command is a long command, and the FPU (101) executes the received save command after the completion of execution of the current command, if the current command is a short command. The attribute of a command is determined in advance on the basis of a time necessary for executing the command and a predetermined criterion provided therefore.
申请公布号 DE68922188(T2) 申请公布日期 1995.09.14
申请号 DE1989622188T 申请日期 1989.11.28
申请人 HITACHI, LTD., TOKIO/TOKYO, JP 发明人 OHBA, MAMORU, HITACHI-SHI IBARAKI 319-12, JP;MORINAGA, SHIGEKI, HITACHI-SHI IBARAKI 316, JP;WATABE. MITSURU, WATABE. MITSURU, KATSUTA-SHI IBARAKI 312, JP;KIDA, HIROYUKI, KOKUBUNJI-SHI TOKYO 185, JP
分类号 G06F9/30;G06F9/38;G06F9/46;G06F11/28;G06F15/16;G06F15/177;(IPC1-7):G06F9/46 主分类号 G06F9/30
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