发明名称 BURN-IN CONTROL CIRCUIT OF SEMICONDUCTOR MEMORY DEVICE AND BURN-IN TEST METHOD USING IT
摘要 <p>PURPOSE: To provide the burn-in control circuit of a burn-in test method which realizes a burn-in test in a package state and realizes the simultaneous test of all memory cells even in SRAM (static RAM). CONSTITUTION: A burn-in control circuit 10 receives input data from an I/O control circuit 6 and discriminates it. A burn-in signal is generated by cutting a first fuse provided in an internal part when input data is for a test. Then, the signal is sent to row/column decoders 2 and 8, the input of an address signal is ignored and all rows and columns are enabled. When data from the I/O control circuit 6 is not for the test, an internal signal for suppressing the generation of the burn-in signal by cutting a second fuse provided in the inertial part and suppressing a self operation so that it does not operate again is generated. In such a case, the row/column decoders 2 and 8 execute the regular write/ read operation in accordance with the address signal.</p>
申请公布号 JPH07201200(A) 申请公布日期 1995.08.04
申请号 JP19940293512 申请日期 1994.11.28
申请人 SAMSUNG ELECTRON CO LTD 发明人 RI SHIYOUKON;KAKU CHIYUUKON
分类号 G01R31/26;G01R31/28;G11C29/00;G11C29/06;G11C29/34;H01L21/66;(IPC1-7):G11C29/00 主分类号 G01R31/26
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