| 摘要 |
PURPOSE:To prevent the step-out of a clock from occurring due to phase jump by providing first and second master clock generating means which comprise a duplex system and a means which selects and sends out either master clocks generated from those systems. CONSTITUTION:The same frequencies with frequency difference are inputted to duplicated clock devices 1, 2 as reference clocks 100, 200. The devices 1, 2 are provided with PLOs(phase locking oscillators) by which communication output can be obtained without respective stationary phase difference. For example, when a fault occurs in the clock device 1 on an ACT (current use) side, switching from the device 1 to the device 2 is performed. If when the phase difference exists between the clocks 100 and 200, the ACT/SBY (spare) of the device 1 is switched first. Simultaneously, the comparison of phase difference between the clock 200 and a feedback clock 203 is performed in a switch control part 20, and an instruction to select the reference clock 200 is issued to a clock selection part 21 at a time when the phase difference is converged within an allowable range. |
