| 摘要 |
PURPOSE: To provide a device for synchronizing a plurality of asynchronous circuits during a test operation. CONSTITUTION: The device is provided with first (26) and second (28) clock inputs, test mode input (30) and output (24). The device receives first clock signals from a first clock by the first clock input and receives second clock signals from a second clock by the second clock input. Corresponding to the state of test mode signals in the test mode input, the device generates the first clock signals or the second clock signals in the output. A first circuit is arranged so as to be driven by the output of the device, and in the meantime, a second circuit is driven by one of the first and second clocks. As a result, the first and second circuits are driven by the different clocks when the test mode signals are in one state and are driven by the same clock when the test mode signals are in the different state. |
