发明名称 INTEGRATED CIRCUIT
摘要 PURPOSE: To reduce thermal and mechanical stresses during a bonding process by effectively utilizing a substrate region under a bond pad. CONSTITUTION: To remove thermal stresses caused during the formation of an active circuit 203 (active component) under a bond pad 219, a plurality of patterned metallic layers 211, 215 and 219 are formed between the pad 219 and a semiconductor layer having the active component. Dielectric layers are formed between the patterned metallic layers, between each patterned metallic layer and the pad 219 and between the pad 219 and the circuit 203. The layer 215 closest to the pad 219 protects the active component from stresses due to a bonding process. The layer 215 is patterned to form a metal region on an active region, whereby an integrated circuit is electrically insulated.
申请公布号 JPH07153922(A) 申请公布日期 1995.06.16
申请号 JP19940200278 申请日期 1994.08.03
申请人 AMERICAN TELEPH & TELEGR CO <ATT> 发明人 SAIRESHIYU CHITEIPEDEI;UIRIAMU TOOMASU KOKURAN
分类号 H01L27/04;H01L21/3205;H01L21/60;H01L21/822;H01L23/485;H01L23/52;H01L23/544;H01L29/78 主分类号 H01L27/04
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