DEVICE WHICH GENERATES COLUMN ADDRESS LATCH SIGNAL

摘要

The column address latch signal generating unit makes video RAM output valid data independent of synchonization with output enable signal or CAS signal. The column address latch signal generating unit outputs column address latch signal by combination of RAS chain master clock and CAS chain master clock and comprises a latch unit inputting CAS chain master clock and controlled by some control signals; a decoder unit inputting RAS chain master clock and the output signals of latch unit.