发明名称 DATA TRANSFER ACCELERATING APPARATUS AND METHOD
摘要 In a computing system, data is transferred from a data source (18) to a memory (20) by generating and sending an optimized instruction sequence to a central processing unit (CPU 12). The CPU (12) executes the instruction sequence to carry out the data transfer in an optimal manner. An apparatus for carrying out the above method comprises a determiner (50), an instruction generator (52), and a coupling circuit (54). The determiner (50), in response to a determination that data transfer is desired, generates a run control signal. The instruction generator (52) generates an optimized instruction sequence using data and address information received from the data source (18), and provides this instruction sequence on its output. The coupling circuit (54), in response to the run control signal, relays the optimized instruction sequence from the instruction generator (52) to the CPU (12) to allow the CPU (12) to execute the instruction set to transfer data from the data source (18) to the memory (20).
申请公布号 WO9506280(A2) 申请公布日期 1995.03.02
申请号 WO1994US09604 申请日期 1994.08.26
申请人 ELECTRONIC ARTS, INC. 发明人 FOWLER, TERRY;MCGRATH, KEVIN;GOODE, TERRY, LEE;SCHNECKLOTH, MARK
分类号 G06F9/312 主分类号 G06F9/312
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