发明名称 Circuit for performing arithmetic operations
摘要 A race-free arithmetic operation circuit is disclosed. The circuit comprises a register file array, an arithmetic logic unit (ALU), and apparatus for controlling the input and/or the output signal of the ALU. The apparatus for controlling can be two level-sensitive latches, located before and after the ALU, or one master-slave flip-flop, located either before or after the ALU.
申请公布号 US5394450(A) 申请公布日期 1995.02.28
申请号 US19930046156 申请日期 1993.04.13
申请人 WAFERSCALE INTEGRATION, INC. 发明人 PASTERNAK, JOHN
分类号 G06F9/38;G11C7/10;(IPC1-7):H03K21/40 主分类号 G06F9/38
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