| 摘要 |
PURPOSE:To prevent interference exerted on between memory elements and ensure optimum writing yield and reliability by causing the presence of an emitter region to be omitted in a memory element but causing the presence of an insulating film in stead of the emitter region to be admittable on a P-type base region. CONSTITUTION:An N<+> type buried layer 2 is prepared on a P-type silicon substrate 1 and N<-> type epitaxial layers 3 are deposited on the surface of a silicon substrate and then, the layers 3 are dielectrically isolated in a plurality of island regions by using silicon dioxide layers 6. Even in islands regions, the epitaxial layers 3 are isolated by preparing the silicon dioxide layers 6 and P-type base regions 4 are prepared at the island regions where memory elements are formed among the isolated epitaxial layers 3. Recessed parts are prepared at these base regions 4 and thin insulating films 11 are prepared so as to cover these recessed parts. And then, metal electrodes 7 are formed on these thin films. At the same time, the metal electrodes 7 are prepared even in the islands having the epitaxial layers where the base regions 4 and the insulating films 11 are not prepared. A short circuit between the electrodes 7 and the base regions 4 is realized by impressing a writing voltage to the thin insulating films 11 and applying dielectric breakdown and such an arrangement allows these insulating films to store the information. |
