发明名称 SIGNAL PROCESSOR OF SUBBAND CODING SYSTEM
摘要 <p>PURPOSE: To obtain a signal processor for a sub-band coding system having simple circuit constitution by constituting an encoding block and a decoding block in the sub-band coding system as one block. CONSTITUTION: A multiplexer 100 receives sampling data, allocation information, synchronous information, and system information to be used for the execution of an encoding operation, deforms these information data into a suitable format and outputs the deformed data to other blocks. A storage means 101 temporarily stores various data received from the multiplexer 100. An arithmetic means 103 scales or descales sampling data. A formatter/deformatter 102 outputs data by matching operated data, the allocation information and the system information inputted to the means 103 with a frame format, receives data and sorts the received data into system information, allocation information, etc. A control means 104 generates a control signal for controlling encoding and decoding operation.</p>
申请公布号 JPH0722957(A) 申请公布日期 1995.01.24
申请号 JP19940069516 申请日期 1994.04.07
申请人 SAMSUNG ELECTRON CO LTD 发明人 RI SHIYAKUSEI;HEN KOUNAN
分类号 H03M7/30;G06T9/00;H04B1/66;(IPC1-7):H03M7/30 主分类号 H03M7/30
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