发明名称 Method for forming MOS transistors having vertical current flow and resulting structure
摘要 The process provides first for the accomplishment of low-doping body regions at the sides and under a gate region and then the accomplishment of high-doping body regions inside said low-doping body regions and self-aligned with said gate region. There is thus obtained an MOS power transistor with vertical current flow which has high-doping body regions self-aligned with said gate region and with a reduced junction depth.
申请公布号 US5382538(A) 申请公布日期 1995.01.17
申请号 US19930066336 申请日期 1993.05.21
申请人 CONSORZIO PER LA RICERCA SULLA MICROELECTRONICA NEL;SGS-THOMSON MICROELECTRONICS S.R.L. 发明人 ZAMBRANO, RAFFAELE;MAGRO, CARMELO
分类号 H01L21/336;H01L29/10;H01L29/78;(IPC1-7):H01L21/265 主分类号 H01L21/336
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