| 摘要 |
A method and device for making a justification decision at a node of a synchronous digital telecommunication system. According to the invention data is stored in a buffer memory (22) and a justification decision is made in response to the phase difference between a counter on the write side of the buffer memory and a counter on the read side of the buffer memory. To reduce jitter caused by justifications, the method according to the invention is characterized by using as said counters on the write side a separate control counter (41) which is allowed to step primarily during each clock cycle in which data is written into the memory, and on the read side a separate control counter (42) which is allowed to step primarily during each clock cycle in which data is read from the buffer memory, and by stopping each control counter (41, 42) several different times in a single row of the frame such that it is stopped for the duration of N bytes in all, the N bytes corresponding to the number of overhead bytes in a single row of the frame. |
