发明名称 Memory module, parity bit emulator, and associated method for parity bit emulation
摘要 A memory module, parity bit emulator, and method which emulate storing and retrieving a parity bit from memory. The memory module includes a memory for storing a data word which is retrieved from the memory during the read cycle. The memory module also includes a parity bit emulator which includes a parity bit generator. The parity bit generator is responsive to the retrieved data word and generates in response a corresponding parity bit during the read cycle. The memory module also includes an input/output port for outputting the retrieved data word and the generated parity bit during the read cycle.
申请公布号 US5367526(A) 申请公布日期 1994.11.22
申请号 US19930080699 申请日期 1993.06.22
申请人 KONG, EDMUND Y. 发明人 KONG, EDMUND Y.
分类号 G06F11/10;(IPC1-7):G06F11/10;H03M13/00 主分类号 G06F11/10
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