发明名称 Offset-insensitive switched-capacitor gain stage
摘要 An IC chip formed with an analog-to-digital converter having a switched-capacitor programmable gain stage and employing a switched-capacitor sigma-delta modulator. The chip includes pins to receive a number of different audio input signals which are selectively connectible to buffer amplifiers the outputs of which are directed to a switch to select one output for further processing. The selected buffer amplifier output is d-c coupled to an input signal terminal of a switched-capacitor programmable gain stage. The output of this gain stage is coupled to an output stage including an op-amp and associated switched-capacitor circuitry. The programmable gain stage has a reference input terminal which is connected through an IC chip pin to an external capacitor the other electrode of which is returned to signal common. This capacitor develops a d-c voltage corresponding to the offset voltages of the operative buffer amplifier and the op-amp, and including a component corresponding to charge-injection from MOS switches. Absorption of such d-c voltages by this capacitor prevents those voltages from being significantly gained by the amplifier circuitry, and thereby prevents those voltages from using up an excessive portion of the dynamic range of the circuitry.
申请公布号 US5363102(A) 申请公布日期 1994.11.08
申请号 US19930037300 申请日期 1993.03.26
申请人 ANALOG DEVICES, INC. 发明人 FERGUSON, JR., PAUL F.
分类号 H03M3/02;(IPC1-7):H03M3/02 主分类号 H03M3/02
代理机构 代理人
主权项
地址