发明名称 |
Sram with flash clear for selectable I/Os. |
摘要 |
<p>A static random access memory having multiple I/Os includes a memory array (10) of memory cells (42) with columns that are selectively clearable as a function of the associated I/O. The columns are arranged in pairs (34) with each column in the pair (34) associated with the same I/O. A clear signal is input thereto on a line (28) and driven by a driver (30). The clear signal is only associated with the pairs (34) associated with a selected I/O. The remaining columns of memory cells associated with unselected I/Os are not cleared.</p> |
申请公布号 |
EP0343068(B1) |
申请公布日期 |
1994.07.20 |
申请号 |
EP19890401362 |
申请日期 |
1989.05.17 |
申请人 |
SGS-THOMSON MICROELECTRONICS, INC. |
发明人 |
MCCLURE, DAVID CHARLES;LYSINGER, MARK A. |
分类号 |
G11C11/41;G06F1/24;G06F12/08;G11C7/10;G11C7/12;G11C7/20;G11C11/413;(IPC1-7):G11C7/00;G11C11/412 |
主分类号 |
G11C11/41 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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