发明名称 Semiconductor memory device having specific layout configuration of n-MOS memory cells
摘要 A semiconductor memory device includes a gate region of each driver transistor arranged obliquely with respect to a first direction of a chip; a source/drain region of each driver transistor arranged obliquely with respect to the first direction; contact windows arranged substantially straight with respect to the first direction and connecting each source/drain region of the driver transistors to a power supply line provided in the first direction; and contact windows arranged every one contact window in a zigzag manner with respect to the first direction and connecting each source/drain region of transfer gate transistors to a corresponding bit line. By the constitution, it is possible to reduce an area of memory cell regions resulting in a reduction in a chip area, and to cause respective driver transistors to have uniform characteristics and thus improve an operation reliability thereof.
申请公布号 US5315146(A) 申请公布日期 1994.05.24
申请号 US19930033577 申请日期 1993.03.18
申请人 FUJITSU LIMITED 发明人 SATO, YOSHIHIDE
分类号 H01L21/82;H01L21/3205;H01L21/822;H01L23/52;H01L27/04;H01L27/10;H01L27/11;(IPC1-7):H01L27/10;H01L27/15;H01L27/02 主分类号 H01L21/82
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