发明名称 |
Semiconductor memory device |
摘要 |
A semiconductor memory device including: a memory cell array having at least one cell array unit, the cell array unit including a plurality of memory cells; a decoder for selecting at least one the memory cell in accordance with an externally supplied address; an input/output terminal for outputting data read from the selected memory cell and for receiving data supplied externally and sending the data to the selected memory cell; at least one data line for connecting the input/output terminal to each the cell array unit; sense amplifiers serially connected to each the data line in a multiple stage configuration for amplifying the read data; a write buffer connected in parallel with one of the sense amplifiers connected to each data line; by-pass switching elements connected between input and output terminals of the other sense amplifiers connected to each the data line; and a control circuit for applying an on-signal to at least one by-pass switching element when writing data, the on-signal turning on at least one by-pass switching element.
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申请公布号 |
US5311469(A) |
申请公布日期 |
1994.05.10 |
申请号 |
US19920845654 |
申请日期 |
1992.03.04 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
HOSHI, SATORU;MASUDA, MASAMI;TAKAHASHI, KAZUHIKO |
分类号 |
G11C11/413;G11C7/06;G11C7/10;G11C11/409;(IPC1-7):G11C7/00 |
主分类号 |
G11C11/413 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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