发明名称 Process and device for adjusting clock signals in a synchronous system
摘要 A process and apparatus for adjusting clock signals in a synchronous system of the type having several units synchronized by clock signals furnished by at least one generator providing a basic clock signal The generator includes means for adjusting the clock signals, the adjustment means being controlled by digital adjustment parameters.
申请公布号 US5305453(A) 申请公布日期 1994.04.19
申请号 US19910750967 申请日期 1991.08.28
申请人 BULL S.A. 发明人 BOUDRY, JEAN-MARIE;BRINKUYSEN, JACQUES
分类号 G06F1/04;G06F1/08;G06F1/10;(IPC1-7):G06F13/00 主分类号 G06F1/04
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