发明名称 User scheduled direct memory access using virtual addresses
摘要 The present invention relates to an intelligent direct memory access (DMA) controller which interprets user commands from a host system, translates virtual addresses from the user applications program to physical addresses, and retrieves blocks of data from the main system memory at the request of the user's code, rather than at the request of the kernel code of the host system. This is accomplished by representing the data processing commands of the user and the data associated therewith as respective command/pointer packets comprised of data processing commands and virtual pointers to the associated data in virtual memory space of the user's host system. The virtual pointers of the command/pointer packets may then be translated to physical pointers for purposes of identifying physical addresses within the main memory at which the associated data is located. The associated data may then be read from the physical address in the main memory without interrupting the host processor. Techniques are also disclosed whereby the attributes of virtual memory systems such as page fault and access fault correction may be maintained in conjunction with the user scheduled DMA technique of the invention.
申请公布号 US5301287(A) 申请公布日期 1994.04.05
申请号 US19930018479 申请日期 1993.02.16
申请人 HEWLETT-PACKARD COMPANY 发明人 HERRELL, RUSS W.;MORRISSEY, THOMAS P.
分类号 G06F12/08;G06F12/10;G06F13/28;(IPC1-7):G06F15/00 主分类号 G06F12/08
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