发明名称 DIVIDER OF HALF OF INTEGER AND LOW-NOISE FREQUENCY SYNTHESIZER USING ANALOG GAIN COMPENSATION
摘要 PURPOSE: To obtain a low-noise frequency synthesizer, having low phase noise and a spurious level by adjusting a gain of a phase detection means for compensating a change in a division number and providing a digital control means that selects a 1st or 2nd division number. CONSTITUTION: A 1st divider 13 receives an input signal f1 and outputs a reference frequency signal fR which is equal to an input signal divided by a 1st dividing number N. A voltage-controlled oscillator 18 generates an output fO of the frequency synthesizer. A divider 15 receives the output fO and outputs a reference frequency signal fC equal to an output signal, divided by a 2nd dividing number M. A phase/frequency detector 14 compares the reference frequencies fR, fC to produce a phase error output signal, and the gain is controlled by a gain control output voltage signal GC of a D/A converter 12. A digital controller 20 adjusts the gain of the detector 14 to compensate a change in the division number and selects a 1st or 2nd division number N, M. Thus, the divider which uses a half of an integer division number and the low-noise frequency synthesizer which uses analog gain compensation are obtained.
申请公布号 JPH0645929(A) 申请公布日期 1994.02.18
申请号 JP19930091631 申请日期 1993.04.19
申请人 HUGHES AIRCRAFT CO 发明人 KEISU PII AANORUDO;JIYOERU SHII BURANKE
分类号 G01S7/282;F41G7/22;G01S7/285;H03L7/08;H03L7/093;H03L7/183;H03L7/197 主分类号 G01S7/282
代理机构 代理人
主权项
地址