发明名称 Noise shaping circuit having plural feedback coefficient multipliers
摘要 Coefficient multipliers are inserted into feedback loops between an output of a delay unit and an input of an adder, and between an output of the other delay unit and the other input of the adder. Here, it is assumed that an input data supplied to an integration circuit is X(z), an output data supplied from the integration circuit is A(z), and an output data of a quantizer is Y(z). Then, the following equations are met. Y(z)=X(z)+Q(1-Z-1)2(1-(alpha)Z-1) where (alpha) is a coefficient of the coefficient multipliers. A(z)=(X(z)+Y(z)*F(z)-Y(z))/F(z) F(z)=(1K1 Z-1) (1-K2 Z-1) . . . (1-Kn Z-1) where K1 to Kn are coefficients of real numbers meeting the relation 0<K1, K2, . . . , Kn<=1.
申请公布号 US5278559(A) 申请公布日期 1994.01.11
申请号 US19920914318 申请日期 1992.07.17
申请人 NEC CORPORATION 发明人 YAZAWA, AKIRA
分类号 H03M3/00;H03M3/02;(IPC1-7):H03M3/02 主分类号 H03M3/00
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