发明名称 SYSTEM BUS CHECK DEVICE
摘要 PURPOSE:To provide the bus check device which does not occupy a system bus by inputting/outputting a check pattern to the system bus by utilizing a period when no information is transferred. CONSTITUTION:This device is provided with an arithmetic means 3 to calculate and output the OR of plural bus use permit signals outputted from a bus priority deciding means 1, signal generating means 4 to output a signal for check to a system bus 2 during a bus use disable period discriminated from the output of the arithmetic means 3, and discriminating means 5 to check the state of the system bus 2 by comparing the signal for check received from the signal generating means 4 through the system bus 2 with the signal for check generated by the signal generating means 4.
申请公布号 JPH05250276(A) 申请公布日期 1993.09.28
申请号 JP19920050342 申请日期 1992.03.09
申请人 FUJITSU LTD 发明人 TERADA NOBUYUKI
分类号 G06F11/22;G06F13/00;G06F13/36 主分类号 G06F11/22
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