发明名称 LOGIC FUNCTION TESTER
摘要 PURPOSE:To automatically enable a switch in the timing from a device to be tested to a tester by controlling the transition time during the cycle of one function test depending on a relative time between reversion edges of same or different kind of signals. CONSTITUTION:Switch processing begins at the start 10. In the initial setting 11, an initial set processing is performed subject to i=1 and j=0 and in the initial setting 12, a Tij initial set processing is performed subject to a reversion edge Tij = correlative time tij. In the circulation processing 13, (i) and (j) are memorized separately in (k) and (l) to implement the subsequent circulation. In the searching 14 of the reference edge, a processing is performed to search the reference edge at the (k) and (l). Here, it is assumed that the reference edge is at nm. In the position decision 15, a determination is made to clarify whether the reference edge is at the beginning of the cycle or not and if the decision is 'not', the operation is branched off to the addition 16 in which tnm is added to the Tij. In the temporary memory 17, (n) and (m) are memorized separately in (k) and (l) and then, the operation is returned to the searching 14. If 15 is 'yes', the time is obtained on the tester for the edge ij.
申请公布号 JPS5824872(A) 申请公布日期 1983.02.14
申请号 JP19810123446 申请日期 1981.08.05
申请人 MITSUBISHI DENKI KK 发明人 KURAMITSU YOUICHI;NOGUCHI TERUO
分类号 G01R31/28;G01R31/317;G01R31/319 主分类号 G01R31/28
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