| 摘要 |
PURPOSE:To prevent the deterioration of transistor characteristics such as a threshold by preventing the formation of a barrier by a capacity P-N junction at the transistor gate region section of the memory cell of 1 transistor 1 capacity. CONSTITUTION:A field oxide film and an oxide thin film 7 for capacity are provided on a P-type Si substrate 5. A B additive poly Si 8 is stacked on the films and high temperature treatment is done in O2 to cover them with an SiO2 film 9. An N<+> layer 11 is made by applying resist masks 10 and by ion implantation. Next, the temperature of the substrate 5 is held at about 200 deg.C and the substrate 5 is exposed to an HF of several Torr. And selective etching removal is applied to the SiO2 9 only under the resist masks. The masks 10 are removed and photo etching is applied to the poly Si by consisting the SiO2 film 9 as a mask. The etching removal is applied to the side face B of the poly Si layer 8 for capacity electrode up to the position slightly behind the edge of the N<+> layer 11. Next, high temperature treatment is applied in H2 and the B is diffused from the poly Si 8 to make a P<+> layer 12 on the substrate 5. In this composition, the area of capacity electrode is smaller than the N<+> layer 11. Therefore, for the gate 13 of a MOSFET, the P<+> layer 12 will be formed without passing over the N<+> layer 11. So a barrier will not be formed and the characteristics of a memory cell will be improved. |
