| 摘要 |
<p>PURPOSE:To eliminate the necessity of reducing the arrangement pitch of the output terminals of peripheral circuits even when memory cells are integrated with a high density, by providing the means for selecting one of groups, each of which comprises bit lines and column lines, the means for selecting a bit line from inside each group, and the means for selecting a column line from inside each group. CONSTITUTION:In a nonvolatile storage, provided are memory cells M (M1, M2,...), which are arranged in the form of a matrix, word lines W1-Wn for selecting rows, auxiliary bit lines B (B12, B21, B22, B31), auxiliary column lines C (C11, C12, C21, C22), and a first, second, and third selecting means 1, 2, 3. Each of the word lines W1-Wn is used both as the selector of each row and the gate which is used in common among columns every memory row. Thereby, using the first selecting means, one of groups, which comprises a plurality of bit lines B and a plurality of column lines C, is selected, and using the second selecting means, a bit line B is selected from inside each group, and it is connected with one of main bit lines B1, B2, B3, and further, using the third selecting means, a column line C is selected from inside each group, and it is connected with one of main column lines C1, C2.</p> |
