发明名称 RECEPTION SIGNAL SYNCHRONIZATION CIRCUIT
摘要 <p>PURPOSE:To allow the circuit to cope with a change in a phase of a data transferred from a slave station to a master station uninterruptibly by predicting a timing to detect a synchronization pattern from a received bit string at next time based on a change quantity of phase information. CONSTITUTION:A difference detection means 6 detects a change quantity of information for each slave station in a timing when a phase information generating means 4 gives an output. A synchronization detection means 5 uses a phase shift adjustment means 7 to predict a timing detected next and a prescribed synchronization pattern detected from a reception bit string from each slave station for a prescribed synchronizing signal based on the information indicating the change. Thus, even when the phase of the bit string received from each slave station is changed, the detection means 5 takes synchronization of the bit string received from each slave station uninterruptibly without causing out of synchronism.</p>
申请公布号 JPH0537501(A) 申请公布日期 1993.02.12
申请号 JP19910188727 申请日期 1991.07.29
申请人 FUJITSU LTD 发明人 YOSHINO TOYOHIKO;TAKAHASHI YUJI;EISAKI HIDEKI
分类号 H04L7/00;H04L12/40 主分类号 H04L7/00
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