| 摘要 |
The duplexer circuit checks a main controller of the digital system to separate the main controller from the system on a fault of the main controller and the connect the system to a preliminary controller. The circuit comprises duplexed control modules having a CPU A, a CPU B, an address latch A, an address latch B, a ROM A, a ROM B, a RAM A, and a RAM B. The circuit includes a comparator having several XOR gates connected to the duplexed control modules to receive the output informations of the RAM's to compare the data of the RAM A with the data of the RAM B, a search control unit (SCU), and a buffer (BF1) for designating the address of the data to be searched.
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