发明名称 CACHE CONTROLLER, FAULT TOLERANT COMPUTER AND ITS DATA TRANSFER SYSTEM
摘要 PURPOSE:To obtain a fault tolerant computer capable of rapidly executing cache flashing operation and provided with a real time property. CONSTITUTION:A processor module 301 is provided with a cache memory and stores the entry address of an updated cache block stored in a cache memory in a stack, and when a recovery point setting condition based on a timer or the like is satisfied, executes cache flashing only to the entry address in the stack. Plural memory modules 303 is provided with buffer memories for temporarily storing each transferred cache block duplexed in the same storing physical space and a cache block is simultaneously transferred to the buffer memories making a pair.
申请公布号 JPH056308(A) 申请公布日期 1993.01.14
申请号 JP19910276804 申请日期 1991.09.27
申请人 MITSUBISHI ELECTRIC CORP 发明人 ISHIDA HITOSHI;SHIGA MINORU;HATASHITA TOYOHITO;TOKUNAGA YUICHI;FUKUDA HIROYUKI;MINEZAKI SHUNYO
分类号 G06F11/00;G06F11/14;G06F11/16;G06F12/08;G11C29/00 主分类号 G06F11/00
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