| 摘要 |
PURPOSE:To improve the using efficiency of respective translation looking aside buffers(TLBs) to be used for the address conversion of a virtual storage in a computer. CONSTITUTION:This address conversion system is hierarchically provided with plural TLBs 102a to 102d and effective bit number storing registers 101a to 101d for storing the number of effective bits whose addresses are to be converted are respectively arranged correspondingly to respective hierarchies. Thereby the size of an address space, i.e., block length, to be covered by a conversion result indicated by one entry in the TLBs 102a to 102d is hierarchically varied by user specification and respective heirarchies are used in accordance with the sizes of a logical address space and a physical address space which are continuously corresponding to each other to execute address conversion. When a continued physical address space larger than a continued logical address space corresponds to the logical address space, the number of necessary TLB entries can be reduced by using entries from a hierarchy having a larger block length. Consequently a larger logical address space can be allowed to correspond to a physical address space by a TLB buffer storage device whose capacity is restricted. |
