发明名称 Selective application of voltages for testing storage cells in semiconductor memory arrangements
摘要 A dynamic RAM is provided with a plurality of 1-MOSFET memory cells, each having a storage capacitor and a switching MOSFET coupled to one electrode of the storage capacitor. The other electrode of each of the storage capacitors is coupled to a switching circuit which controls the voltage which is applied to the capacitor. The switching circuit is, in turn, coupled to both a voltage generating circuit (which preferably provides a voltage of 1/2 Vcc) and a voltage supply circuit which is set to provide predetermined test voltages. Thus, by operating the switching circuit, a voltage of 1/2 Vcc can be applied to the memory cell capacitors during normal operation of the dynamic RAM, and the predetermined test voltages can be applied to the memory cell capacitors during a testing operation.
申请公布号 US5157629(A) 申请公布日期 1992.10.20
申请号 US19890336345 申请日期 1989.04.10
申请人 HITACHI, LTD. 发明人 SATO, KATSUYUKI;KAWAMOTO, HIROSHI;YANAGISAWA, KAZUMASA
分类号 G11C11/4074;G11C29/50 主分类号 G11C11/4074
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