发明名称 SAMPLING CLOCK REPRODUCTION CIRCUIT
摘要 PURPOSE:To reproduce a sampling clock at a receiver side and to attain effective utilization of a transmission speed with respect to the sampling clock reproduction circuit reproducing the sampling clock to read out a picture signal received and stored in a picture storage memory sequentially from the picture storage memory. CONSTITUTION:The reproduction circuit is provided with a storage quantity detection means 1 detecting the storage quantity of a picture signal stored in a picture storage memory and a repetitive frequency control means 2 controlling the repetitive frequency of a sampling clock to be reproduced so as to keep the storage quantity to be a prescribed storage quantity based on the storage quantity of the picture signal detected by the storage quantity detection means 1.
申请公布号 JPH04267688(A) 申请公布日期 1992.09.24
申请号 JP19910028287 申请日期 1991.02.22
申请人 FUJITSU LTD 发明人 NARAHIRA SADAO
分类号 H03L7/091;H03L7/02;H04N5/06;H04N7/14;H04N7/15;H04N19/00;H04N19/42;H04N19/423;H04N19/80;H04N19/85 主分类号 H03L7/091
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