| 摘要 |
PURPOSE:To obtain a barrel shifter circuit which is reducible in circuit scale and improved in arithmetic speed without requiring any incrementer for the arithmetic of a shift quantity as to the barrel shifter which shifts binary data in digit. CONSTITUTION:A barrel shifter whose shifting operation is indicated with a sign bit showing a negative shift quantity and a shift quantity of a complementary display of '2' inverts the bit of data on the shift quantity by a complementer 8 for '1', rearranges the bit positions of input data by a bit position inversion and one-bit shifter part 9 according to the sign bit to make a one-bit shift, and outputs the result. Bit shifters 3-6 which are cascaded in order shift the output data by the number of bits increasing with a factorial of '2' in increasing order according to whether the respective bits of the output of the '1' complement unit 8 are significant or not and a bit position inversion part 7 changes the bit positions between the corresponding high-order and low- order bits and outputs the result. |
