| 摘要 |
PURPOSE:To speed up bit processing of a microprocessor by providing a decoder for selecting bits to be subject to arithmetic processing, and an arithmetic circuit which user an output latch signal as an input. CONSTITUTION:A decode 6 selects a bit to be subject to arithmetic processing and outputs a signal 7. A central processing unit outputs information 5 for deciding the position of the bit to be subject to arithmetic processing, information indicating the content of the arithmetic processing, and operational data 9 to an arithmetic circuit 12 through an internal bus 2. The arithmetic circuit 12 inputs output latch data 10 by feedback and performs the arithmetic processing without using the accumulator unit of the central processing unit. |
