| 摘要 |
PURPOSE:To verify a trouble process sufficiently by providing an address comparing function of hardware, an EIJ trigger address table, an EIJ injection program address table, and an EIJ inspection program. CONSTITUTION:Such a data pattern that a parity error signal of a data bus (n) is generated in an EIJ kind specification register 25 as the program is executed is set. Consequently, a data bus nEIJ signal is transmitted as a signal 306 to an AND 27 by passing the set data pattern through a decoder 26. Then the output signal 307 of the AND 27 can invert the parity signal 308 of the data bus by an EOR 28 in EIJ enable mode and a check latch 30 can be turned ON by supplying the output signal 309 of the EOR 28 and data bus (n) data 310 to a parity checker 29. Consequently, the verification accuracy of a trouble processing part can be improved. |
