| 摘要 |
PURPOSE:To perform display on a panel display device even in the case of the operating system where non-maskable interrupts cannot be used by providing a register array, where an I/O address and register values are stored, and a sub-CPU which writes respective values in a graphic LSI. CONSTITUTION:The I/O address and register values outputted from a main CPU (central processing unit) 1 are stored in a register array 6. After a sub-CPU 7 causes the main CPU 1 to wait, the I/O address and register values stored in the register array 6 are written in registers of a graphic LSI 2 by the sub- CPU 7. The sub-CPU 7 discriminates the display mode to set data for panel. Thus, display on a panel display device 4 is possible even in the operating system where non-maskable interrupts cannot used. |
