| 摘要 |
<p>PURPOSE:To enable designing and production cost of a digital pulse compression device and compression processing time to be reduced by performing a high- speed Fourier transformation, a reference function multiplication, and an inverse high-speed Fourier transformation by a digital signal processor. CONSTITUTION:A digital signal processor 1 performs a high-speed Fourier transformation, a reference function multiplication, and an inverse high-speed Fourier conversion and performs its basic calculation. Buffer memories 2, 3, 5, and 6 for I/O and operation where it is connected achieve double buffering as well as data I/O. Then, a buffer memory for coefficients 4 store coefficients and reference functions of a high-speed Fourier conversion, a reference function multiplication, and coefficients and reference functions of an inverse high-speed Fourier transformation. A program control device 7 performs program execution commands of the data I/O control, high-speed Fourier conversion, reference function multiplication, and inverse high-speed Fourier conversion and address control of the memories 2 - 6, thus enabling compression processing of digital pulses to be made.</p> |
