发明名称 DELAY LINE CIRCUIT ARRANGEMENT AND ULTRASONIC IMAGING APPARATUS UTILIZING THE SAME
摘要 <p>An analogue delay line circuit arrangement is constructed by a plurality of delay line elements and a plurality of compensation amplifiers. These delay line elements and compensation amplifiers are series-connected, one by one, so as to construct a cascade connection. The input echo signals are delayed in the delay line elements and simultaneously the amplitudes thereof abruptly decrease at the high frequency range. The cascade-connected amplifiers can compensate for the abrupt decrease of the signal amplitudes. The delay line elements are constructed of passive elements such as the capacitors and inductors. The compensation amplifiers are constructed of active elements such as the emitter follower transistor.</p>
申请公布号 EP0150051(B1) 申请公布日期 1992.04.01
申请号 EP19850100458 申请日期 1985.01.17
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 IIDA, TAKETOSHI C/O PATENT DIVISION
分类号 A61B8/14;A61B8/00;G01S7/52;G01S15/89;H03H11/26 主分类号 A61B8/14
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