发明名称 DIAGNOSTIC SYSTEM FOR FAULT DETECTION CIRCUIT
摘要 PURPOSE:To easily carry out the test and the diagnosis of a fault detection circuit and a fault detecting/holding means with use of the hardware of small capacity by adding a flip-flop showing a diagnostic mode. CONSTITUTION:A diagnostic control part sets '0' to a mode flip-flop F/F 12 when the test/diagnosis is applied to the parity check circuits 4 - 6 and the fault display F/F 7 - 9. In this case, an output signal 112 of the F/F 12 outputs '0' and therefore an output signal 111 of an AND gate 11 outputs '0' regardless of the value of an input signal 113. Then the output signals 105 - 107 of the circuits 4 - 6 are always set to the F/F 7 - 9. If the data having a parity error is added to the data 101 inputted from another control part, these data are successively set to the data registers 1 - 3. Then the fault display registers 7 - 9 whose faults are detected by the circuits 4 - 6 are all set at '1'. Thus the test/diagnosis can be easily carried out.
申请公布号 JPH0424832(A) 申请公布日期 1992.01.28
申请号 JP19900129554 申请日期 1990.05.18
申请人 NEC CORP 发明人 UEHARA IZUYUKI
分类号 G06F11/08;G06F11/22 主分类号 G06F11/08
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