发明名称 Pattern matching circuit.
摘要 <p>The invention is a pattern matcher which (i) compares two or more multi-symbol data patterns, symbol-by-symbol, and detects any mis-matches, or errors, (ii) combines into a relatively small number of encoded bits information relating to the number of errors, and (iii) examines a single encoded bit to determine if the two patterns "match", i.e., if they differ by less than a predetermined number of symbols, or error threshold. The invention further includes a multi-bit output signal which may be used to determine, for patterns which match, the actual number of errors. &lt;IMAGE&gt;</p>
申请公布号 EP0463752(A2) 申请公布日期 1992.01.02
申请号 EP19910305093 申请日期 1991.06.05
申请人 DIGITAL EQUIPMENT CORPORATION 发明人 DEROO, JOHN E.;FRAME, ROBERT C.;RUB, BERNARDO
分类号 H04L7/08;G06F7/02;G06F7/60;G11B20/18;H04L7/04 主分类号 H04L7/08
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