发明名称 VECTOR PROCESSING APPARATUS ALLOWING SUCCEEDING VECTOR INSTRUCTION CHAIN PROCESSING UPON COMPLETION OF DECODING OF A PRECEDING VECTOR INSTRUCTION CHAIN
摘要 A vector processing apparatus includes a vector processing unit having a vector instruction decoder and a scalar processing unit including a scalar instruction decoder for activating the vector processing unit in response to a scalar instruction commanding initiation of the processing of a vector instruction chain. The vector processing unit further includes an incidation register which is set in response to the initiation of decodiung of the vector instruction chain by the vector instruction decoder and reset in response to the decoding of an end vector instruction of the vector instruction chain. So long as the indication circuit is in the reset state, the vector processing unit is allowed to initiate the processing of a vector instruction chain under the command of the scaler processing unit.
申请公布号 US5073970(A) 申请公布日期 1991.12.17
申请号 US19900471667 申请日期 1990.01.24
申请人 HITACHI, LTD.;HITACHI COMPUTER ENGINEERING CO., LTD. 发明人 AOYAMA, TAMOO;INAGAMI, YASUHIRO;NURAYAMA, HIROSHI
分类号 G06F17/16;G06F15/78 主分类号 G06F17/16
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