| 摘要 |
PURPOSE:To enable stable data transfer without depending on a distance with no control by storing the output of a delay detecting means into a storing means and controlling a selective circuit according to stored contents. CONSTITUTION:A timing generation circuit 1 generates the plural frame pulses of various phases and plural phase clocks corresponding to those frame pulses. For example, these plural frame pulses and phase clocks are composed of totally two groups advancing the phase clocks by a half clock. The selecting circuit 2 correspondently selects the frame pulses and clock pulses to be generated by the timing generation circuit 1, and a delay detecting means 4 discriminates whether the frame pulse from an external part is delayed or not in respect to the frame pulse generated from the timing pulse generation circuit 1 and delayed by a delay means 3. A storing means 5 stores the output of the delay detecting means 4 and according to the stored contents, the selective circuit 2 is controlled. In such a manner, the phase is automatically controlled and timing is selected so as to obtain the correct phase. Thus, manual work is not required and the stable data transfer is enabled. |
