发明名称 EXPOSING METHOD FOR SEMICONDUCTOR WAFER AND RETICULE FOR STEP EXPOSING
摘要 <p>PURPOSE:To remove a resist with good accuracy and ease of execution by disposing a semiconductor wafer in the exposing position of an exposing device, step exposing a device pattern in the central part of the semiconductor wafer and step exposing a dropout simple aperture pattern in a peripheral region. CONSTITUTION:The reticule 10 is disposed in the stepper exposing device and the semiconductor wafer 30 coated with the resist is disposed in the exposing position of the stepper exposing device. The device pattern 11 is first exposed by concerning the peripheral exposing pattern 13. The device pattern 11 is then step exposed on the semiconductor wafer 30. After the exposing of the prescribed device pattern 11 is executed a prescribed number of times, the device pattern 11 is concealed to expose the peripheral exposing pattern 13 and the dropout peripheral exposing pattern 13 is step exposed in the periphery of the semiconductor wafer 30. The resist in the peripheral part is completely and exactly removed in this way if the resist is developed after exposing of the peripheral part.</p>
申请公布号 JPH03237459(A) 申请公布日期 1991.10.23
申请号 JP19900034163 申请日期 1990.02.14
申请人 FUJITSU LTD 发明人 KAWAMURA EIICHI
分类号 G03F1/68;G03F1/70;G03F7/20;H01L21/027;H01L21/30 主分类号 G03F1/68
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