发明名称 LEITERPLATTENHERSTELLUNGSVERFAHREN.
摘要 The invention provides a method for preparing a printed circuit board with solder plated circuit and through-holes, using a specifically prepared photoresist material and a combination of exposure, development, solder plating and etching means. This method is particularly useful for the preparation of a printed circuit-board with solder plated circuit and through-holes bearing a high density circuit pattern.
申请公布号 DE204415(T1) 申请公布日期 1987.04.09
申请号 DE19860303108T 申请日期 1986.04.24
申请人 NIPPON PAINT CO., LTD., OSAKA, JP 发明人 ISHIKAWA, KATSUKIYO, KUZE-GUN KYOTO-FU, JP;NISHIJIMA, KANJI, IBARAKI-SHI OSAKA-FU, JP;SEIO, MAMORU C/O NIPPON PAINT CO, NISHINOMIYA-SHI, HYOGO-KEN, JP
分类号 H05K3/42;G03F7/004;G03F7/16;H05K3/06;H05K3/10;H05K3/34;(IPC1-7):H05K3/34;G03F7/10 主分类号 H05K3/42
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