发明名称 PHASE LOCKED LOOP CIRCUIT
摘要 PURPOSE:To quickly lock in an input signal by constituting a loop filter of a narrow band loop filter and a broad band loop filter and switching these loop filters and changing the characteristic of the broad band loop filter in accordance with the lock-in state. CONSTITUTION:When a certain lock-in state is attained within a time set by a filter control circuit 11, a filter control signal 12 does not change the characteristic of a broad band loop filter 2 to continue the lock-in operation. Otherwise, the filter control circuit 11 changes the characteristic of the filter 2 by the filter control signal 12. The characteristic of the filter 2 is so changed at this time that the input signal can be quickly locked in. Thus, the input signal which requires a long time for lock-in of cannot be locked in with the initial characteristic of the filter 2 is quickly locked in.
申请公布号 JPH03217124(A) 申请公布日期 1991.09.24
申请号 JP19900013233 申请日期 1990.01.23
申请人 SEIKO EPSON CORP 发明人 KASAI KENICHIRO
分类号 H03L7/107 主分类号 H03L7/107
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