EASILY CONFIGURABLE FULLY DIFFERENTIAL FAST LOGIC CIRCUIT

摘要

Fast CMOS fully differential logic circuitry, using only tristatable buffers, and capable of as low as a single transistor propagation delay. The preferred embodiment of the invention includes four tristatable buffers (A1, A2, A3, and A4) connected together in such a way as to have multiple differential inputs and one differential output. Different configurations of the output and inputs make different logic functions available. An alternate embodiment combines three of these logic circuits to make a fully differential 3-input full adder, generating sum (SUM/SUM*) and carry outputs (COUT/COUT*) within two transistor delays.