发明名称 Assembling system of semiconductor chip.
摘要 <p>An assembling system of a semiconductor chip comprises a die bonding step, a wire bonding step, a molding step, a deflashing step, a lead cladding step, a marking step, a lead bending step, a testing step and a tape-wrapping step, which are arranged in the order mentioned. Each of the molding step, the deflashing step and the lead cladding step is performed by only a first treating apparatus (12, 13 or 14). Each of the die bonding step, the wire bonding step, the marking step, the lead bending step, the testing step and the taping step is performed by first and second treating apparatuses (10, 11, 15, 16, 17 or 18). The second treating apparatus is substantially equal in function to the first treating apparatus and arranged in parallel with the first treating apparatus so as to share the operation of each treating step. Where the second treating apparatuses are included in two adjacent treating steps, these two second treating apparatuses are connected in series. Where the first treating apparatus alone is included in the adjacent treating step, the second treating apparatus is connected to the first treating step. &lt;IMAGE&gt;</p>
申请公布号 EP0439084(A2) 申请公布日期 1991.07.31
申请号 EP19910100649 申请日期 1991.01.21
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 NAKAGAWA, KAORU, C/O INTELLECTUAL PROPERTY DIV.;TATUMI, YOSHIAKI, C/O INTELLECTUAL PROPERTY DIV.;HASEGAWA, TAIJI C/O INTELLECTUAL PROPERTY DIV.;NAKAGIRI, MINORU, C/O INTELLECTUAL PROPERTY DIV.
分类号 H01L21/50;H01L21/00 主分类号 H01L21/50
代理机构 代理人
主权项
地址